SpeadConventions

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Synthesis Array Conventions

Reserved Options

Instance ID

In order to support sub-arrays, we need a means to identify to which instance of an instrument this packet belongs. Further, since larger instruments consist of multiple processing engines, this field provides a means of labelling the source engine (required for reassembling packetised correlator output in the correct order, for example).

It is subdivided into two 24-bit fields: the MSB 24-bits represent the instrument instance and the second 24-bits represent the engine instance ID of instrument subgroup. The significance of this field will change depending on the instrument.

For example, this entire option will always be zero for a system consisting of a single-board, single-antenna spectrometer. For more complex instruments, this option will be used to indicate that the stream belongs to a particular beam or correlator subgroup. For example, a beamformer might consist of ten FPGAs, each one outputting a subset of frequencies and capable of forming two beams. The first 24-bit field could then range [0 1] and the second field [0 1 2 3 4 5 6 7 8 9].

Timestamp and Timestamp Scale Factor

This field timestamps all data for the correlator, beamformer, spectrometer and other KAT DBE instruments. This field was designed to be easily generated on FPGA instruments. The product of the timestamp multiplied by the timestamp scale factor represents the number of ADC samples acquired.

A zero acquired sample count corresponds to the time at which the system was last synchronised to a 1PPS signal. The last synchronisation time is reported in the metadata fields IDs 15 and 16 in real-time seconds since the Unix epoch.

If data is integrated (eg correlator or spectrometer), then this value will represent the time that the accumulation began (the time of the ADC sample of the first channel in the first spectrum of the accumulation)[1].

Previous Packet Data Error Counter

If non-zero, indicates the number of accumulations that were not performed due to a failure. For example, if the user requested 1000 integrations, but only 891 were performed, this field’s value would be . This applies to the PREVIOUS packet’s data from this engine (ie you need to match the instance ID field). Omitting this option is equivalent to a zero error count.

Quantisation Scalar (X and Y Polarisation, Real and Imaginary)

Most instruments perform quantisation before accumulation (eg, packetised correlator and beamerformer: 4 bits). Digital gain control is implemented before quantisation to ensure correct bit selection. The value in this field indicates the level of gain applied. Gains are not necessarily linear. Values are unit-less and are specified per-frequency channel, per input. The gains are complex, having a real and imaginary component. The system’s amplitude response should be recalibrated if this value changes.

The 48-bit field is subdivided as follows:

Number of bits

Representation

(MSB) 16

Input number

16

Frequency channel

(LSB) 16

Digital gain

Phase slope and Phase offset

LSB 32-bit values indicating current phase slope and offset for a given polarisation. Timestamps will accompany these updates.

FFT Shift pattern

Indicates if a divide-by-2 was done between butterfly stages in the FFT. LSB is last FFT stage, with every higher bit representing the previous FFT stage. Only the FFT Length LSBs are valid. This is an internal DBE parameter and should be constant.

Number of bits

Representation

(MSB) 16

Input number

1

Polarisation (X=0, 1=Y)

(LSB) 31

FFT shift pattern

X Engine Accumulation Length

Represents the accumulation which takes place within the X engine (packetised correlator specific). This places a lower limit on the integration time as well as sets the granularity of the accumulation period.

F Engine Packet Payload Length

Should be equal to X engine accumulation length (packetised correlator specific).

Processing engine clock rate

The clock rate of the X engines and B engines. This value is an estimate. These run asynchronously to the F engines and should be clocked at a higher rate to ensure buffers don’t overflow. For POCO, this should be .

Number of bits

Representation

(MSB) 16

Board number

(LSB) 32

Clock speed (Hz)

ADC overflow status

This field indicates that an overflow occurred on said ADC (lsb set) at time indicated by field ID 42. Assume that overflow continued until another update is received for this ADC (lsb cleared).

Number of bits

Representation

(MSB) 16

ADC Input number

1

Polarisation (X=0, 1=Y)

31

Reserved. Ignore.

(LSB) 1

ADC overflow occurred on this input.

Center frequencies, bandwidth, ADC sample rates

These frequencies are given in integer Hz, with an optional fractional component in femto-Hz. If no optional fractional component is given, assume it to be zero.

[1] This places an upper bound on the scale factor of the number of samples processed per accumulation, while the lower bound is 1.